ICTP-MLAB RVI

The RVI includes one mother board (the RVI main board) and two daughter boards. The motherboard is built around a medium to large capacity FPGA device (ACTEL A3PE 600/1500/3000) and four main blocks, namely: a block of communication ports, an extension memory, debugging facilities and miscellaneous components, and two high quality board-to-board connectors with 54 pins directly connected to the FPGA general purpose I/Os.
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Actel/Microsemi IGLOO Icicle

Actel's IGLOO Icicle Kit, based on the 5 µW IGLOO device, is a low-cost, portable, low-power demonstration platform powered by built-in rechargeable lithium-ion battery, USB cable, or external power.
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Actel/Microsemi Fusion

Microsemi's Fusion Embedded Development Kit provides a comprehensive solution for quickly evaluating Microsemi's Fusion® mixed-signal FPGA family and prototyping your design. This development kit enables swift design development based on the royalty-free, industry standard ARM ® CortexTM-M1 processor or Core8051. The kit is fully RoHS-compliant and contains the incredibly powerful ARM Cortex-M1-enabled Fusion M1AFS1500 device in the FGG484 package
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Digilent/Xilinx Nexys 2

The Nexys 2 is a powerful digital system design platform built around a Xilinx Spartan 3E FPGA. With 16Mbytes of fast SDRAM and 16Mbytes of Flash ROM, the Nexys 2 is ideally suited to embedded processors like Xilinx's 32-bit RISC Microblaze™. The on-board high-speed USB2 port, together with a collection of I/O devices, data ports, and expansion connectors, allow a wide range of designs to be completed without the need for any additional components.
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Digilent/Xilinx Zedboard

ZedBoard is a low-cost development board for the Xilinx Zynq™-7000 All Programmable SoC (AP SoC). This board contains everything necessary to create a Linux, Android, Windows® or other OS/RTOS based design. Additionally, several expansion connectors expose the processing system and programmable logic I/Os for easy user access.
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Terasic DE0

The DE0 Development and Education board is designed in a compact size with all the essential tools for novice users to gain knowledge in areas of digital logic, computer organization and FPGAs. It is equipped with Altera Cyclone III 3C16 FPGA device, which offers 15,408 LEs. The board provides 346 user I/O pins, and is loaded with a rich set of features that makes it suitable to be used for advanced university and college courses, as well as the development of sophisticated digital systems. The DE0 combines the Altera low-power, low-cost, and high performance Cyclone III FPGA to control the various features of the DE0 Board. The DE0 Development Board includes software, reference designs, and accessories required to ensure the user simple access in evaluating their DE0 Board.
Moderators: Jsvegam, sbaadmin

Terasic/Altera DE1

The purpose of the Altera DE1 Development and Education board is to provide the ideal vehicle for advanced design prototyping in the multimedia, storage, and networking. It uses the state-of-the-art technology in both hardware and CAD tools to expose designers to a wide range of topics. The board offers a rich set of features that make it suitable for use in a laboratory environment for university and college courses, for a variety of design projects, as well as for the development of sophisticated digital systems. Altera provides a suite of supporting materials for the DE1 board, including tutorials, "ready-to-teach" laboratory exercises, and illustrative demonstrations.
Moderator: Jsvegam

Terasic DE1 SoC

The DE1-SoC Development Kit presents a robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system. Altera’s SoC integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals and memory interfaces tied seamlessly with the FPGA fabric using a high-bandwidth interconnect backbone. The DE1-SoC development board includes hardware such as high-speed DDR3 memory, video and audio capabilities, Ethernet networking, and much more.
Moderators: Jsvegam, sbaadmin

Terasic/Altera DE2

The purpose of the Altera DE2 Development and Education board is to provide the ideal vehicle for advanced design prototyping in the multimedia, storage, and networking. It uses the state-of-the-art technology in both hardware and CAD tools to expose designers to a wide range of topics. The board offers a rich set of features that make it suitable for use in a laboratory environment for university and college courses, for a variety of design projects, as well as for the development of sophisticated digital systems. Altera provides a suite of supporting materials for the DE2 board, including tutorials, "ready-to-teach" laboratory exercises, and illustrative demonstrations.
Moderators: Jsvegam, sbaadmin